1. Field of the Invention
This invention relates to electrically erasable programmable read-only memories.
2. Description of the Prior Art
Kahng and Sze in the Bell Systems Technical Journal for July and August of 1967, pages 1288-1295 describe an EPROM cell. This cell employs a sandwich structure comprising in successive layers, a p type channel formed in an n type substrate, a first insulation layer, a metal floating gate, a second insulation layer and a metal control gate. When the first insulation layer is sufficiently thin or small and a positive bias is applied to the control gate with respect to a source region, the mechanism of tunneling or internal tunnel-hopping causes an electron accumulation on the floating gate.
EPROM cells are also described in (1) Siemens Forsch.-U. Entwickl.-Ber. Bd. (1975) Nr. 6, pages 345-351, in an article entitled "Erasable and Electrically Reprogrammable Read-Only Memory Using the N-Channel SIMOS One Transistor Cell," by authors B. Rossler and R. G. Muller; (2) Solid-State Electronics, Vol. 21, pp. 521-529, 1978 in an article entitled "Operation and Characterization of N. Channel EPROM Cells," by author J. Barnes, and (3) IEEE Transactions on Electronic Devices Vol. ED-24 No. 5, pp. 600-610, May, 1977 in an article entitled "Technology of a New N-Channel One-Transistor EAROM Cell Called SIMOS," by authors A. Scherbe and H. Schulte. This EPROM cell is illustrated in detail infra in FIGS. 1-3.
Other examples of EPROM cells are described in U.S. Pat. No. 3,984,822 and No. 4,019,197.